How to Overcome Cyber Security Threat from Quantum Computing
The disruptive potential of Quantum computers to break current cryptographic algorithms poses a significant threat to global IT security. PQC security will require adjustments to address currently unknown threats. However, since security is completely dependent on the security of the firmware update mechanism, it is critical that Hash-based signatures (HBS) are now implemented within firmware update mechanisms.
Quantum computers use quantum mechanical phenomena to create incredibly powerful computers that will be able to perform tasks that exceed the capabilities of conventional computers. Already proven on a limited scale, governments are pouring billions into continued research in this area, with the aim of making it a reality in the next two decades. In fact, just recently the British government acquired their first quantum computer to investigate the value of the technology in defence.
While the main goal is to greatly improve computing power for scientific applications, the disruptive potential of these machines to break current cryptographic algorithms poses a significant threat to global IT security. Asymmetric cryptosystems like RSA / ECC are particularly vulnerable, while symmetric algorithms like AES-256 and SHA-256 are less affected and considered safe, at least for now.
It can be expected that most consumer devices such as smartphones or tablets will naturally be upgraded before quantum computers arrive in their masses, so there may be less urgency with these devices. Infrastructure such as power stations, factories, public transport, etc. however, will remain in use after quantum computers arrive – as will many modern vehicles that receive software updates over the air.
Once a quantum computer is in the hands of professional adversaries, critical infrastructure is at risk. The threat will evolve so that there will be no ‘forever’ solution, but quantum computing risks need to be mitigated now – as far as possible. It has been recognized by the National Institute of Standards and Technology (NIST) which is actively working on quantum secure public key encryption, key exchange and digital signatures. Meanwhile, stateful hash-based signatures are considered an interim approach.
Stateful Hash-based signatures
Hash-based signatures (HBS) are ‘stateful’ asymmetric post-quantum cryptographic schemes which mean that only a limited number of signatures can be generated with a private key and previously used keys require management. However, careful state management is essential as HBS schemes can be trivially broken if a private key is reused.
Using stateful HBS for signature verification is fast with embedded platforms and can be made faster with hashing wrappers. Key generation and signing can also be implemented on embedded security devices as it allows the secure control of private keys and their state(s). In general, HBS is very suitable for firmware updates, especially since it is the only asymmetric post-quantum computing (PQC) algorithms that are currently standardized.
PQC security hardware – OPTIGA™ TPM SLB 9672
Infineon’s OPTIGA TPM SLB 9672 incorporates a PQC protected firmware update mechanism and is certified to meet the Common Criteria standard and complies with the TCG 2.0 rev. 1.59 specification as well as the new NIST standard, SP 800-90B.
The new device offers stronger cryptographic algorithms, including RSA 3k & 4k, SHA-384 and ECC 384, giving a 192-bit symmetric security level. It will expand to 256 bits by adding support for SHA-512 and ECC-521 in the future.
The firmware update mechanism itself is more resistant to quantum attacks as it uses XMSS signatures. The Infineon update authority can handle stateful XMSS keys, keeping firmware updates secure and allowing continuity. Conveniently, the OPTIGA™ SLB 9672 can transparently check the XMSS signature to validate the transferred payload.
The OPTIGA SLB 9672 is compatible with Intel x86, ARM and other platforms and applications include servers, desktops, general purpose computers and data storage. It also supports a wide range of gateways, routers, wireless access points, network interface cards and switches.
Support of the development process
The OPTIGA TPM SLB 9672 RPI evaluation board provides a quick and easy way for developers to start using the device with a Raspberry Pi. Supplied as a Raspberry Pi HAT (hardware attached on top), this add-on simplifies the connection of all Raspberry Pi 40-pin GPIO boards.
To enable easy board evaluation and integration, Infineon also provides the OPTIGA™ TPM 2.0 Explorer, a GUI-based software tool that allows designers to explore the benefits of TPMs in a wide variety of applications without deeper knowledge of the product.
The tool allows designers to initialize a TPM 2.0, display all properties, and perform a full reset when needed. The non-volatile memory (NVRAM) can be managed, and PCR indexes can be handled, as well as defining access to and recovery from a lockout event. The GUI provides immediate visual feedback so that commands are executed and responses received can be reviewed and quickly understood.
For PC users, the OPTIGA TPM SLB 9672 PC evaluation board enables developers to familiarize themselves with the SLB 9672 TPM. When used with Infineon’s simple command line interlace tool – the Embedded Linux TPM Toolbox 2 (ELTT2) and T4TPM2 for Linux and Windows respectively – developers can simply connect the plug-and-play device to the SPI interface on ‘ connect a computer motherboard. It allows the testing and integration of a TPM solution into a platform running one of many operating systems, including Windows 10/11, Linux, Windows 10/11 IoT Enterprise, Windows Server IoT, and more.